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#cuda

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Tag · #cuda
DAY 01September 19, 2026 SEP 19 · 20261 SUMMARIES
AI EngineerSoftware Engineering

Optimizing Transformer Inference with FlashNorm

FlashNorm accelerates transformer inference by folding RMS norm gains into projection weights and parallelizing normalization and matrix multiplication via custom CUDA kernels.

AI Engineer
DAY 02August 27, 2026 AUG 27 · 20261 SUMMARIES
AI EngineerAI & LLMs

Can LLMs Write Fast Multi-GPU Kernels?

While LLMs excel at single-GPU code, they struggle with multi-GPU kernel optimization because they lack a deep, reasoning-based understanding of interconnect topologies, data partitioning, and the complex trade-offs between copy engines and tensor memory acceleration.

AI Engineer
DAY 03June 29, 2026 JUN 29 · 20261 SUMMARIES
Together AI BlogInference & Serving

ParallelKernelBench: Frontier LLMs Struggle with Multi-GPU Kernels

While LLMs excel at single-GPU kernel generation, they currently struggle with multi-GPU tasks where communication bottlenecks and complex rank coordination dominate performance.

Together AI Blog
DAY 04June 9, 2026 JUN 9 · 20261 SUMMARIES
MarkTechPostSoftware Engineering

Building Tiled GPU Kernels with NVIDIA cuTile Python

NVIDIA cuTile allows developers to write efficient, tile-based GPU kernels directly in Python, providing a structured way to handle memory access and computation that can be benchmarked against standard PyTorch operations.

MarkTechPost
DAY 05May 30, 2026 MAY 30 · 20261 SUMMARIES
MarkTechPostSoftware Engineering

mKernel: Fusing Compute and Communication for GPU-Driven Scaling

mKernel eliminates host-driven communication bottlenecks by fusing intra-node NVLink, inter-node RDMA, and compute into persistent CUDA kernels, enabling fine-grained overlap at the tile level.

MarkTechPost
DAY 06May 6, 2026 MAY 6 · 20261 SUMMARIES
Level Up CodingSoftware Engineering

CUDA Matrix Transpose: Naive to Swizzled Optimization

Matrix transpose on GPU pits coalesced reads against writes; solve via shared memory tiling, then fix bank conflicts with padding or XOR swizzling, plus float4 vectorization for peak bandwidth.

Level Up Coding

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